1. Field of the Invention
The present invention relates to a semiconductor device sealed with silicone resin.
2. Description of the Prior Art
Silicone resin is an organosilicon compound which has a basic structural formula where silicon having an organic group combines alternately with oxygen. Silicone resin has been used generally as an insulating material for sealing power semiconductor devices or the like, because of its small cure-shrinkage and excellent hermetic performance.
FIG. 10 is a cross-sectional side view of a power semiconductor device sealed with a silicone resin. In the figure, an emitter plate 1 is laid over a collector plate 2 with an insulation plate 3 in-between and three of them are accommodated in a resin case 5 together with a control board 4. A resin member 6b, which is formed of a conventional semiconductor sealing resin, occupies the inside of the resin case 5. A metal base plate 7,which constitutes a bottom surface of a power semiconductor device, is fixedly attached to the resin case 5. A ceramic substrate 8 is provided for heat radiation and its both surfaces are respectively bonded to an upper substrate electrode 9 and a lower substrate electrode 10. The lower substrate electrode 10 is soldered with the metal base plate 7. A power semiconductor chip 11 is soldered to an upper surface of the upper substrate electrode 9 and is operative upon receiving a control signal from the control board 4.
Aluminum wires 12 connect the emitter plate 1, the collector plate 2, the upper substrate electrode 9, and the power semiconductor chip 11 with each other. A lid 14 is bonded to an upside opening portion of the resin case 5. The resin case 5, the metal base plate 7, and the lid 14 constitute a casing member. The control board 4 communicates by way of an outside terminal base 15. Inside terminal bases 13 support the weight of the control board 4 by way of connection poles 16. The emitter plate 1, which is layered with the collector plate 2 by way of the insulation plate 3, is bonded to the metal base plate 7 with an aid insulation plate 17 in-between.
The emitter plate 1, the insulation plate 3 and the collector plate 2 are bonded each other usually with adhesive sheets in-between for the purpose of constructing a laminated plate of the emitter plate 1 and the collector plate 2. Bonding with an adhesive sheet produces a large number of gaps in the adhesive portions. Although the gaps are in a reduced-atmosphere at an early stage, they will be soon in a normal atmosphere when left untouched. When the gaps in a normal atmosphere are heated in a heat cycle test or a power cycle test, air in the gaps is pushed out toward the resin member 6b and leads to the formation of voids (see FIG. 11A). Voids are formed in the cycle tests between the ceramic substrate 8 and the upper/lower substrate electrodes 9,10 or between the metal base plate 7 and the lower substrate electrode 10.
Here, the power cycle test is a test in which the power semiconductor chip 11 is repeatedly subjected to an ON/OFF drive so as to heat the power chip up to a temperature approximately 100xc2x0C. On the other hand, the heat cycle test is a test in which the power semiconductor device is put in an oven to make the whole device hot and cool repeatedly.
A vibration test also develops some voids from remaining gaps, which induce cracking (splits) in the resin member 6b (see FIG. 11B). The coefficient of linear thermal expansion of the ceramic substrate 8 (ca. 5xc3x9710xe2x88x926/xc2x0 C.) and that of the power semiconductor chip 11 (ca. 4.5xc3x9710 xe2x88x926/xc2x0 C.) are not more than 1/100 of the coefficient of linear thermal expansion of the resin member 6b (ca. 1xc3x9710xe2x88x923/xc2x0 C.). Then, performing the heat cycle or the power cycle develops a peeling-off at an interface between the insulation plate 3 and the resin member 6b (FIG. 11C). The interfacial peeling-off also occurs in the vicinity of the power semiconductor chip 11 or the ceramic substrate 8, sometimes accompanying a destructive cracking in the resin member 6b. 
Further, the control board 4, which is fixedly attached to the power semiconductor chip 11, becomes an obstacle against the deformation of the resin member 6b, when the resin member 6b expands or shrinks corresponding to the heat/power cycles or the vibration cycle. Hence, cracking is formed from the end portion of the control board 4 and the aluminum wires 12 are crack-ruptured.
The above-mentioned cracking or the interfacial peeling-off of the resin member 6b or the rupturing of the aluminum wires 12 hardly occur, when a bottom area of the casing member is sufficiently large compared with a height of the casing member (for example, not less than 1xc3x97101) or such a bottom area is sufficiently small compared with the height of the casing member (for example, not more than 1xc3x9710xe2x88x925). Since a general power semiconductor device has a (height)/(bottom area) of 2xc3x9710xe2x88x923 (1/mm), for example, the device is liable in structure to cause cracking and interfacial peeling-off in the resin member 6b or rupturing of the aluminum wires 12.
When a high voltage is applied to a portion where the voids, the cracks or the interfacial peeling-off are formed, there arises a drawback that noises derived from a partial discharge (a micro discharge) cause a failure of the power semiconductor chip 11 to function properly. Further, there has been another drawback that the connection reliability of the aluminum wires is lowered to result in a false operation of the power semiconductor device, because the aluminum wires, which are ruptured by the cure shrinkage of the resin member 6b, increase a voltage load applied to other aluminum wires.
Accordingly, it is an object of the present invention to minimize the formation of voids, cracks or interfacial peeling-off in a resin member of a semiconductor device even if a heat cycle, a vibration cycle or the like is applied to the semiconductor device.
A semiconductor device according to the present invention comprises a semiconductor chip which is fixedly located over a metal base plate, a resin member which is formed of a silicone resin and seals the semiconductor chip, and a casing member which surrounds the resin member and is capable of externally supplying electric power to the semiconductor chip, wherein a cured silicone resin, which is obtained by curing the silicone resin at a given temperature, has a number of percent elongation after fracture measured at a room temperature not less than 4% of a penetration number at a room temperature.
The cured silicone resin may have a penetration number at a room temperature not less than 10 and not more than 80 and a loss elasticity not less than 17% of the storage elasticity. The resin member may include a filler, such as silica or alumina.